Sciweavers

1784 search results - page 291 / 357
» Formal Models for Embedded System Design
Sort
View
FMCAD
2007
Springer
15 years 1 months ago
Circuit Level Verification of a High-Speed Toggle
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...
Chao Yan, Mark R. Greenstreet
FMICS
2006
Springer
15 years 1 months ago
Can Saturation Be Parallelised?
Abstract. Symbolic state-space generators are notoriously hard to parallelise. However, the Saturation algorithm implemented in the SMART verification tool differs from other seque...
Jonathan Ezekiel, Gerald Lüttgen, Radu Simini...
EPK
2006
114views Management» more  EPK 2006»
14 years 11 months ago
Verifying Properties of (Timed) Event Driven Process Chains by Transformation to Hybrid Automata
Abstract: Event-driven Process Chains (EPCs) are a commonly used modelling technique for design and documentation of business processes. Although EPCs have an easy-to-understand no...
Stefan Denne
ATAL
2008
Springer
14 years 11 months ago
Specifying and enforcing norms in artificial institutions
In this paper we investigate two related aspects of the formalization of open interaction systems: how to specify norms, and how to enforce them by means of sanctions. The problem...
Nicoletta Fornara, Marco Colombetti
DOLAP
2005
ACM
14 years 11 months ago
Applying MDA to the development of data warehouses
Different modeling approaches have been proposed to overcome every design pitfall of the development of the different parts of a data warehouse (DW) system. However, they are all ...
Jose-Norberto Mazón, Juan Trujillo, Manuel ...