714 search results - page 61 / 143 » Formal Verification of Cognitive Models |
122
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FORMATS
2009
Springer
15 years 5 months ago
2009
Springer
Probabilistic timed automata (PTAs) are used for formal modelling and verification of systems with probabilistic, nondeterministic and real-time behaviour. For non-probabilistic ti...
140
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FLAIRS
2008
15 years 4 months ago
2008
Storyboards are commonly known as rows of pictures, which exemplarily sketch scenes in performing arts. The rows specify the sequence of scenes. The scenes themselves are illustra...
105
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CCS
2006
ACM
15 years 5 months ago
2006
ACM
We present a process algebraic intruder model for verifying a class of liveness properties of security protocols. For this class, the proposed intruder model is proved to be equiv...
117
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ROOM
2000
15 years 3 months ago
2000
In this paper we provide a systematic formal interpretation for most elements of the UML notation. This interpretation, in a structured temporal logic, enables precise analysis of...
108
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ISSS
2000
IEEE
15 years 6 months ago
2000
IEEE
The ever increasing complexity of embedded systems consisting of hardware and software components poses a challenge in verifying their correctness, New verification methods that o...