858 search results - page 101 / 172 » Formal Verification of Digital Systems |
109
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FMCAD
2008
Springer
15 years 18 days ago
2008
Springer
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
AICCSA
2001
IEEE
15 years 2 months ago
2001
IEEE
This paper2 details the stages of building a substantial, carefully specified, fully tested and fully operational university and school timetabling system. This is reported as a c...
DSN
2004
IEEE
15 years 2 months ago
2004
IEEE
It is often the case that safety-critical systems have to be reconfigured during operation because of issues such as changes in the system's operating environment or the fail...
CCS
2008
ACM
15 years 1 months ago
2008
ACM
As cryptographic protocols execute they accumulate information such as values and keys, and evidence of properties about this information. As execution proceeds, new information b...
127
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DLT
2009
14 years 8 months ago
2009
Abstract. Temporal logics are a well investigated formalism for the specification and verification of reactive systems. Using formal verification techniques, we can ensure the corr...