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» Formal Verification of Digital Systems
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ICFEM
2007
Springer
15 years 2 months ago
Testing for Refinement in CSP
Abstract. CSP is a well-established formalism for modelling and verification of concurrent reactive systems based on refinement. Consolidated denotational models and an effective t...
Ana Cavalcanti, Marie-Claude Gaudel
FMICS
2006
Springer
15 years 2 months ago
Verified Design of an Automated Parking Garage
Parking garages that stow and retrieve cars automatically are becoming viable solutions for parking shortages. However, these are complex systems and a number of severe incidents i...
Aad Mathijssen, A. Johannes Pretorius
82
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FMCAD
2000
Springer
15 years 2 months ago
B2M: A Semantic Based Tool for BLIF Hardware Descriptions
BLIF is a hardware description language designed for the hierarchical description of sequential circuits. We give a denotational semantics for BLIF-MV, a popular dialect of BLIF, t...
David A. Basin, Stefan Friedrich, Sebastian Mö...
FDL
2008
IEEE
15 years 25 days ago
RTL Generation of Channel Architecture Templates for a Template-based SoC Design Flow
In this paper, we propose the design methodology for communication channel templates from formal specification to RTL description. In this flow, design and verification start from...
Jinhyun Cho, Soonwoo Choi, Soo Chae
ROOM
2000
15 years 12 days ago
Statecharts as Protocols for Objects
For the specification of object-oriented systems, usually several models representing different views are developed. The necessary integration of views is often delayed until impl...
Annette Laue, Matthias Liedtke, Daniel Moldt, Ivan...