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» Formal Verification of Digital Systems
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POPL
2009
ACM
16 years 2 months ago
Unifying type checking and property checking for low-level code
We present a unified approach to type checking and property checking for low-level code. Type checking for low-level code is challenging because type safety often depends on compl...
Jeremy Condit, Brian Hackett, Shuvendu K. Lahiri, ...
FORTE
1997
15 years 3 months ago
Automatic Checking of Aggregation Abstractions Through State Enumeration
c Checking of Aggregation Abstractions Through State Enumeration Seungjoon Park, Member, IEEE, Satyaki Das, and David L. Dill, Member, IEEE —Aggregation abstraction is a way of d...
Seungjoon Park, Satyaki Das, David L. Dill
ATAL
2010
Springer
15 years 2 months ago
Verifying agents with memory is harder than it seemed
ATL+ is a variant of alternating-time temporal logic that does not have the expressive power of full ATL , but still allows for expressing some natural properties of agents. It ha...
Nils Bulling, Wojciech Jamroga
FORMATS
2010
Springer
14 years 12 months ago
Layered Composition for Timed Automata
Abstract. We investigate layered composition for real-time systems modelled as (networks of) timed automata (TA). We first formulate the principles of layering and transition indep...
Ernst-Rüdiger Olderog, Mani Swaminathan
ICECCS
2009
IEEE
129views Hardware» more  ICECCS 2009»
15 years 8 months ago
CONNECT Challenges: Towards Emergent Connectors for Eternal Networked Systems
—The CONNECT European project that started in February 2009 aims at dropping the interoperability barrier faced by today’s distributed systems. It does so by adopting a revolut...
Valérie Issarny, Bernhard Steffen, Bengt Jo...