We present a parametric Hoare-like logic for computer-aided reasoning about typeable properties of functional programs. The logic is based on the concept of a specialised assertio...
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...
State machine based formalisms such as labelled transition systems (LTS) are generally assumed to be complete descriptions m behaviour at some level of abstraction: if a labelled ...
Abstract. This paper shows that we can take advantage of information about the probabilities of the occurrences of events, when this information is available, to refine the classic...
Abstract. In this paper, we give an algorithm for fault-tolerant proactive leader election in asynchronous shared memory systems, and later its formal verification. Roughly speakin...