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» Formal Verification of Digital Systems
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ICFP
2005
ACM
15 years 11 months ago
Types with semantics: soundness proof assistant
We present a parametric Hoare-like logic for computer-aided reasoning about typeable properties of functional programs. The logic is based on the concept of a specialised assertio...
Olha Shkaravska
MEMOCODE
2007
IEEE
15 years 5 months ago
Towards Equivalence Checking Between TLM and RTL Models
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli...
SIGSOFT
2003
ACM
15 years 12 months ago
Behaviour model elaboration using partial labelled transition systems
State machine based formalisms such as labelled transition systems (LTS) are generally assumed to be complete descriptions m behaviour at some level of abstraction: if a labelled ...
Sebastián Uchitel, Jeff Kramer, Jeff Magee
100
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ECAI
2008
Springer
15 years 27 days ago
A probabilistic analysis of diagnosability in discrete event systems
Abstract. This paper shows that we can take advantage of information about the probabilities of the occurrences of events, when this information is available, to refine the classic...
Farid Nouioua, Philippe Dague
ATVA
2006
Springer
109views Hardware» more  ATVA 2006»
15 years 1 months ago
Proactive Leader Election in Asynchronous Shared Memory Systems
Abstract. In this paper, we give an algorithm for fault-tolerant proactive leader election in asynchronous shared memory systems, and later its formal verification. Roughly speakin...
M. C. Dharmadeep, K. Gopinath