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» Formal Verification of Digital Systems
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KI
2002
Springer
14 years 10 months ago
Advantages, Opportunities and Limits of Empirical Evaluations: Evaluating Adaptive Systems
While empirical evaluations are a common research method in some areas of Artificial Intelligence (AI), others still neglect this approach. This article outlines both the opportun...
Stephan Weibelzahl, Gerhard Weber
POPL
2007
ACM
15 years 11 months ago
A very modal model of a modern, major, general type system
We present a model of recursive and impredicatively quantified types with mutable references. We interpret in this model all of the type constructors needed for typed intermediate...
Andrew W. Appel, Christopher D. Richards, Jé...
PLDI
2010
ACM
15 years 3 months ago
Bringing Extensibility to Verified Compilers
Verified compilers, such as Leroy's CompCert, are accompanied by a fully checked correctness proof. Both the compiler and proof are often constructed with an interactive proo...
Zachary Tatlock, Sorin Lerner
SIGSOFT
2007
ACM
15 years 12 months ago
Symbolic message sequence charts
Message Sequence Charts (MSCs) are a widely used visual formalism for scenario-based specifications of distributed reactive systems. In its conventional usage, an MSC captures an ...
Abhik Roychoudhury, Ankit Goel, Bikram Sengupta
80
Voted
ICSM
2002
IEEE
15 years 4 months ago
Maintaining Software with a Security Perspective
Testing for software security is a lengthy, complex and costly process. Currently, security testing is done using penetration analysis and formal verification of security kernels....
Kanta Jiwnani, Marvin V. Zelkowitz