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» Formal Verification of Digital Systems
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CAV
2009
Springer
165views Hardware» more  CAV 2009»
15 years 10 months ago
Symbolic Counter Abstraction for Concurrent Software
Counter Abstraction for Concurrent Software G?erard Basler1 , Michele Mazzucchi1 , Thomas Wahl1,2 , Daniel Kroening1,2 1 Computer Systems Institute, ETH Zurich, Switzerland 2 Compu...
Daniel Kroening, Gérard Basler, Michele Maz...
POPL
2010
ACM
15 years 7 months ago
A Relational Modal Logic for Higher-Order Stateful ADTs
The method of logical relations is a classic technique for proving the equivalence of higher-order programs that implement the same observable behavior but employ different intern...
Derek Dreyer, Georg Neis, Andreas Rossberg, Lars B...
73
Voted
KCAP
2005
ACM
15 years 3 months ago
Acquisition and maintenance of constraints in engineering design
The Designers’ Workbench is a system, developed by the Advanced Knowledge Technologies (AKT) consortium to support designers in large organizations, such as RollsRoyce, by makin...
Suraj Ajit, Derek H. Sleeman, David W. Fowler, Dav...
ECMDAFA
2005
Springer
130views Hardware» more  ECMDAFA 2005»
15 years 3 months ago
Control Flow Analysis of UML 2.0 Sequence Diagrams
This article presents a control flow analysis methodology based on UML 2.0 sequence diagrams (SD). In contrast to the conventional code-based control flow analysis techniques, thi...
Vahid Garousi, Lionel C. Briand, Yvan Labiche
110
Voted
TCAD
2008
101views more  TCAD 2008»
14 years 10 months ago
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
Ilya Wagner, Valeria Bertacco, Todd M. Austin