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» Formal Verification of Digital Systems
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ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
15 years 7 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
CCR
2000
78views more  CCR 2000»
14 years 10 months ago
Some guidelines for non-repudiation protocols
Non-repudiation protocols aim at preventing parties in a communication from falsely denying having taken part in that communication; for example, a non-repudiation protocol for di...
Panagiotis Louridas
118
Voted
DAC
2010
ACM
15 years 1 months ago
Scalable specification mining for verification and diagnosis
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
Wenchao Li, Alessandro Forin, Sanjit A. Seshia
ENTCS
2006
93views more  ENTCS 2006»
14 years 10 months ago
A Rule-based System for Web site Verification
In this paper, we describe a system, written in Haskell, for the automated verification of Web sites which can be used to specify (partial) correctness and completeness properties...
Demis Ballis, Javier García-Vivó