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» Formal Verification of Digital Systems
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ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
15 years 2 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
FLAIRS
2000
14 years 11 months ago
Formal Software Development in the Verification Support Environment (VSE)
The paper presents a survey of the VSE system, a kind of CASE-tool for formal software development. It is a summary of a tutorial presentation describing methodology, formalisms, ...
Dieter Hutter, Georg Rock, Jörg H. Siekmann, ...
SOSP
2009
ACM
15 years 7 months ago
seL4: formal verification of an OS kernel
Gerwin Klein, Kevin Elphinstone, Gernot Heiser, Ju...
IJCAI
2003
14 years 11 months ago
Formal Verification of Diagnosability via Symbolic Model Checking
This paper addresses the formal verification of diagnosis systems. We tackle the problem of diagnosability: given a partially observable dynamic system, and a diagnosis system obs...
Alessandro Cimatti, Charles Pecheur, Roberto Cavad...
96
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ICCD
2000
IEEE
119views Hardware» more  ICCD 2000»
15 years 1 months ago
Source-Level Transformations for Improved Formal Verification
A major obstacle to widespread acceptance of formal verification is the difficulty in using the tools effectively. Although learning the basic syntax and operation of a formal ver...
Brian D. Winters, Alan J. Hu