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» Formal Verification of Digital Systems
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84
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CAV
1994
Springer
111views Hardware» more  CAV 1994»
15 years 2 months ago
Automatic Verification of Timed Circuits
This paper presents a new formalism and a new algorithm for verifying timed circuits. The formalism, called orbital nets, allows hierarchical verification based on abehavioralseman...
Tomas Rokicki, Chris J. Myers
80
Voted
ASPDAC
2004
ACM
144views Hardware» more  ASPDAC 2004»
15 years 2 months ago
Verification of timed circuits with symbolic delays
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...
Robert Clarisó, Jordi Cortadella
72
Voted
DAC
2000
ACM
15 years 11 months ago
Formal verification of iterative algorithms in microprocessors
Contemporary microprocessors implement many iterative algorithms. For example, the front-end of a microprocessor repeatedly fetches and decodes instructions while updating interna...
Mark Aagaard, Robert B. Jones, Roope Kaivola, Kath...
FMCAD
2006
Springer
15 years 1 months ago
Post-reboot Equivalence and Compositional Verification of Hardware
We introduce a finer concept of a Hardware Machine, where the set of post-reboot operation states is explicitly a part of the FSM definition. We formalize an ad-hoc flow of combin...
Zurab Khasidashvili, Marcelo Skaba, Daher Kaiss, Z...
105
Voted
FCSC
2010
170views more  FCSC 2010»
14 years 7 months ago
Formal verification of concurrent programs with read-write locks
Abstract Read-write locking is an important mechanism to improve concurrent granularity, but it is difficult to reason about the safety of concurrent programs with read-write locks...
Ming Fu, Yu Zhang, Yong Li