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» Formal Verification of Digital Systems
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FORMATS
2006
Springer
15 years 2 months ago
Integrating Discrete- and Continuous-Time Metric Temporal Logics Through Sampling
Abstract. Real-time systems usually encompass parts that are best described by a continuous-time model, such as physical processes under control, together with other components tha...
Carlo A. Furia, Matteo Rossi
DSD
2005
IEEE
116views Hardware» more  DSD 2005»
15 years 4 months ago
Validation of Embedded Systems Using Formal Method Aided Simulation
This paper proposes a validation approach, based on simulation, which addresses problems related to both state space explosion of formal methods and low coverage of informal metho...
Daniel Karlsson, Petru Eles, Zebo Peng
FMCAD
2004
Springer
15 years 2 months ago
Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques
In this paper we demonstrate a potential extension of formal verification methodology in order to deal with time-domain properties of analog and mixed-signal circuits whose dynamic...
Thao Dang, Alexandre Donzé, Oded Maler
ICPR
2008
IEEE
15 years 11 months ago
Towards mobile authentication using dynamic signature verification: Useful features and performance evaluation
The proliferation of handheld devices such as PDAs and smartphones represents a new scenario for automatic signature verification. Traditionally, research on signature verificatio...
Marcos Martinez-Diaz, Julian Fiérrez-Aguila...
DATE
2008
IEEE
95views Hardware» more  DATE 2008»
15 years 4 months ago
Improving Constant-Coefficient Multiplier Verification by Partial Product Identification
Constant-coefficient multipliers are fundamental components in digital signal processing and arithmetic-based systems. Their verification, however, remains difficult and time-cons...
Chao-Yue Lai, Chung-Yang Huang, Kei-Yong Khoo