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» Formal Verification of Digital Systems
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ENTCS
2006
109views more  ENTCS 2006»
14 years 10 months ago
Incremental Verification for On-the-Fly Controller Synthesis
The CIRCA system automatically synthesizes hard real-time discrete event controllers from plant and environment descriptions. CIRCA's automatically-synthesized controllers pr...
David J. Musliner, Michael J. S. Pelican, Robert P...
CADE
2007
Springer
15 years 10 months ago
System for Automated Deduction (SAD): A Tool for Proof Verification
In this paper, a proof assistant, called SAD, is presented. SAD deals with mathematical texts that are formalized in the ForTheL language (brief description of which is also given)...
Konstantin Verchinine, Alexander V. Lyaletski, And...
FSEN
2009
Springer
15 years 2 months ago
Verification, Performance Analysis and Controller Synthesis for Real-Time Systems
This note aims at providing a concise and precise Travellers Guide, Phrase Book or Reference Manual to the timed automata modeling formalism introduced by Alur and Dill [7, 8]. The...
Uli Fahrenberg, Kim G. Larsen, Claus R. Thrane
ICSE
1999
IEEE-ACM
15 years 2 months ago
A Practical Method for Verifying Event-Driven Software
Formal verification methods are used only sparingly in software development. The most successful methods to date are based on the use of model checking tools. To use such he user ...
Gerard J. Holzmann, Margaret H. Smith
EUROMICRO
1998
IEEE
15 years 2 months ago
Design Correctness of Digital Systems
Transformational design is aformal technique directed at design correctness. It integrates design and veriJication by the use of pre-proven behaviour preserving transformations as...
Corrie Huijs