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» Formal Verification of Digital Systems
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SIGSOFT
2010
ACM
14 years 8 months ago
Top ten ways to make formal methods for HPC practical
Almost all fundamental advances in science and engineering crucially depend on the availability of extremely capable high performance computing (HPC) systems. Future HPC systems w...
Ganesh Gopalakrishnan, Robert M. Kirby
HASE
1999
IEEE
15 years 2 months ago
Model Checking UML Statechart Diagrams Using JACK
Statechart Diagrams provide a graphical notation for describing dynamic aspects of system behaviour within the Unified Modeling Language (UML). In this paper we present a branchin...
Stefania Gnesi, Diego Latella, Mieke Massink
FM
2003
Springer
107views Formal Methods» more  FM 2003»
15 years 3 months ago
A Formal Framework for Modular Synchronous System Design
We present the formal framework for a novel approach for specifying and automatically implementing systems such as digital circuits and network protocols. The goal is to reduce the...
Maria-Cristina V. Marinescu, Martin C. Rinard
RTAS
1998
IEEE
15 years 2 months ago
Verification of the Fast Reservation Protocol with Delayed Transmission using the Tool Kronos
In this paper we report the work carried out at VERIMAG 1 within the framework of an research cooperation with CNET 2 . The goal of this work was twofold: to formally specify the ...
Stavros Tripakis, Sergio Yovine
FORTE
2009
14 years 8 months ago
Approximated Context-Sensitive Analysis for Parameterized Verification
Abstract. We propose a verification method for parameterized systems with global conditions. The method is based on context-sensitive constraints, a symbolic representation of infi...
Parosh Aziz Abdulla, Giorgio Delzanno, Ahmed Rezin...