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» Formal Verification of Digital Systems
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DFT
2009
IEEE
189views VLSI» more  DFT 2009»
15 years 4 months ago
Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
Meng Zhang, Anita Lungu, Daniel J. Sorin
84
Voted
CORR
2010
Springer
59views Education» more  CORR 2010»
14 years 8 months ago
Refinement and Verification of Real-Time Systems
This paper discusses highly general mechanisms for specifying the refinement of a real-time system as a collection of lower level parallel components that preserve the timing and ...
Paul Z. Kolano, Carlo A. Furia, Richard A. Kemmere...
DATE
2004
IEEE
97views Hardware» more  DATE 2004»
15 years 1 months ago
A Formal Verification Methodology for Checking Data Integrity
Formal verification techniques have been playing an important role in pre-silicon validation processes. One of the most important points considered in performing formal verificati...
Yasushi Umezawa, Takeshi Shimizu
FMCAD
2000
Springer
15 years 1 months ago
Do You Trust Your Model Checker?
Abstract. In this paper we describe the formal specification and verification of the efficient algorithm for real-time model checking implemented in the model checker RAVEN. It was...
Wolfgang Reif, Jürgen Ruf, Gerhard Schellhorn...