858 search results - page 60 / 172 » Formal Verification of Digital Systems |
81
Voted
UML
2004
Springer
15 years 4 months ago
2004
Springer
Abstract. In this paper, we propose a verification methodology for System-OnChip (SoC) design using Unified Modeling Language (UML). We introduce UML as a formal model to analyze a...
94
Voted
SAC
2008
ACM
14 years 10 months ago
2008
ACM
Despite its relatively short history, a wealth of formalisms exist for algebraic specification of stochastic systems. The goal of this paper is to give such formalisms a unifying ...
ECRTS
1998
IEEE
15 years 3 months ago
1998
IEEE
In this paper we demonstrate the usage of a formal description technique for real-time systems called PLCAutomaton [4] by applying this method to a real-world case study. To this ...
147
Voted
AGTIVE
2007
Springer
15 years 2 months ago
2007
Springer
On the basis of a case-study, we demonstrate the usefulness of topology invariants for model-driven systems development. Considering a graph grammar semantics for a relevant fragme...
107
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FMCAD
1998
Springer
15 years 3 months ago
1998
Springer
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...