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» Formal Verification of Digital Systems
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HF
2007
131views more  HF 2007»
14 years 10 months ago
Formal Analysis and Automatic Generation of User Interfaces: Approach, Methodology, and an Algorithm
In this paper we propose a formal approach and methodology for analysis and generation of human-machine interfaces, with special emphasis on human-automation interaction. Our appr...
Michael Heymann, Asaf Degani
90
Voted
COMPSEC
2004
104views more  COMPSEC 2004»
14 years 10 months ago
Formal support for certificate management policies
Traditionally, creation and revocation of certificates are governed by policies that are carried manually, off-line, by trusted agents. This approach to certificate management is ...
Victoria Ungureanu
SP
2010
IEEE
152views Security Privacy» more  SP 2010»
14 years 8 months ago
Scalable Parametric Verification of Secure Systems: How to Verify Reference Monitors without Worrying about Data Structure Size
The security of systems such as operating systems, hypervisors, and web browsers depend critically on reference monitors to correctly enforce their desired security policy in the ...
Jason Franklin, Sagar Chaki, Anupam Datta, Arvind ...
FDBS
2001
108views more  FDBS 2001»
15 years 7 days ago
Combining a Formal with an Example-driven Approach for Data Integration
Integrating data sources is a general problem in many scenarios. The main problem is the heterogeneity between data sources which were created and developed separately. In the lit...
Ingolf Geist, Kai-Uwe Sattler, Ingo Schmitt
89
Voted
ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
15 years 2 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...