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DATE
2004
IEEE
134views Hardware» more  DATE 2004»
15 years 5 months ago
Arithmetic Reasoning in DPLL-Based SAT Solving
We propose a new arithmetic reasoning calculus to speed up a SAT solver based on the Davis Putnam Longman Loveland (DPLL) procedure. It is based on an arithmetic bit level descrip...
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
15 years 5 months ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier
ATAL
2008
Springer
15 years 3 months ago
OperettA: a prototype tool for the design, analysis and development of multi-agent organizations
OperettA is a graphical tool that supports the design, verification and simulation of OperA models. It ensures consistency between different design parts, provides a formal specif...
Daniel Okouya, Virginia Dignum
AIPS
2006
15 years 3 months ago
Structure and Problem Hardness: Goal Asymmetry and DPLL Proofs in SAT-Based Planning
In AI Planning, as well as Verification, a successful method is to compile the application into boolean satisfiability (SAT), and solve it with state-of-the-art DPLL-based procedu...
Jörg Hoffmann, Carla P. Gomes, Bart Selman
IPL
2008
110views more  IPL 2008»
15 years 1 months ago
Reduction of stochastic parity to stochastic mean-payoff games
Abstract. A stochastic graph game is played by two players on a game graph with probabilistic transitions. We consider stochastic graph games with -regular winning conditions speci...
Krishnendu Chatterjee, Thomas A. Henzinger