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FMCAD
2006
Springer
15 years 5 months ago
Advanced Unbounded Model Checking Based on AIGs, BDD Sweeping, And Quantifier Scheduling
In this paper we present a complete method for verifying properties expressed in the temporal logic CTL. In contrast to the majority of verification methods presented in recent yea...
Florian Pigorsch, Christoph Scholl, Stefan Disch
FMICS
2006
Springer
15 years 5 months ago
Verified Design of an Automated Parking Garage
Parking garages that stow and retrieve cars automatically are becoming viable solutions for parking shortages. However, these are complex systems and a number of severe incidents i...
Aad Mathijssen, A. Johannes Pretorius
FORMATS
2006
Springer
15 years 5 months ago
Symbolic Robustness Analysis of Timed Automata
We propose a symbolic algorithm for the analysis of the robustness of timed automata, that is the correctness of the model in presence of small drifts on the clocks or imprecision ...
Conrado Daws, Piotr Kordy
ACSD
2001
IEEE
134views Hardware» more  ACSD 2001»
15 years 5 months ago
Embedding Imperative Synchronous Languages in Interactive Theorem Provers
We present a new way to define the semantics of imperative synchronous languages by means of separating the control and the data flow. The control flow is defined by predicates th...
Klaus Schneider
AICCSA
2001
IEEE
131views Hardware» more  AICCSA 2001»
15 years 5 months ago
Constraint-Based Timetabling-A Case Study
This paper2 details the stages of building a substantial, carefully specified, fully tested and fully operational university and school timetabling system. This is reported as a c...
Abdulwahed M. Abbas, Edward P. K. Tsang