When designers create RTL models from a system-level specification, arrays in the system-level model are often implemented as memories in the RTL. Knowing the correspondence betwe...
We present an approach for applying symmetry reduction techniques to probabilistic model checking, a formal verification method for the quantitative analysis of systems with stocha...
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
We focus on decomposition of hard-masking real-time faulttolerant programs (where safety, timing constraints, and liveness are preserved in the presence of faults) that are design...
Borzoo Bonakdarpour, Sandeep S. Kulkarni, Anish Ar...
The methodology of aspect-oriented software engineering has been proposed to factor out concerns that are orthogonal to the core functionality of a system. In particular, this is a...