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DAC
2007
ACM
15 years 5 months ago
Memory Modeling in ESL-RTL Equivalence Checking
When designers create RTL models from a system-level specification, arrays in the system-level model are often implemented as memories in the RTL. Knowing the correspondence betwe...
Alfred Kölbl, Jerry R. Burch, Carl Pixley
CAV
2006
Springer
132views Hardware» more  CAV 2006»
15 years 5 months ago
Symmetry Reduction for Probabilistic Model Checking
We present an approach for applying symmetry reduction techniques to probabilistic model checking, a formal verification method for the quantitative analysis of systems with stocha...
Marta Z. Kwiatkowska, Gethin Norman, David Parker
136
Voted
CODES
2008
IEEE
15 years 3 months ago
Model checking SystemC designs using timed automata
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Paula Herber, Joachim Fellmuth, Sabine Glesner
EMSOFT
2008
Springer
15 years 3 months ago
Disassembling real-time fault-tolerant programs
We focus on decomposition of hard-masking real-time faulttolerant programs (where safety, timing constraints, and liveness are preserved in the presence of faults) that are design...
Borzoo Bonakdarpour, Sandeep S. Kulkarni, Anish Ar...
DAGSTUHL
2006
15 years 3 months ago
A Framework for Analyzing Composition of Security Aspects
The methodology of aspect-oriented software engineering has been proposed to factor out concerns that are orthogonal to the core functionality of a system. In particular, this is a...
Jorge Fox, Jan Jürjens