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CAV
2004
Springer
111views Hardware» more  CAV 2004»
15 years 7 months ago
Using Interface Refinement to Integrate Formal Verification into the Design Cycle
Jacob Chang, Sergey Berezin, David L. Dill
HASE
2008
IEEE
15 years 1 months ago
Aiding Modular Design and Verification of Safety-Critical Time-Triggered Systems by Use of Executable Formal Specifications
Designing safety-critical systems is a complex process, and especially when the design is carried out at different f abstraction where the correctness of the design at one level i...
Kohei Sakurai, Péter Bokor, Neeraj Suri
96
Voted
DAC
2000
ACM
16 years 2 months ago
Formal verification of iterative algorithms in microprocessors
Contemporary microprocessors implement many iterative algorithms. For example, the front-end of a microprocessor repeatedly fetches and decodes instructions while updating interna...
Mark Aagaard, Robert B. Jones, Roope Kaivola, Kath...