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150
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IFM
2010
Springer
205views Formal Methods» more  IFM 2010»
14 years 7 months ago
Adding Change Impact Analysis to the Formal Verification of C Programs
Handling changes to programs and specifications efficiently is a particular challenge in formal software verification. Change impact analysis is an approach to this challenge where...
Serge Autexier, Christoph Lüth
86
Voted
ENTCS
2008
94views more  ENTCS 2008»
14 years 9 months ago
A Formal Model of Memory Peculiarities for the Verification of Low-Level Operating-System Code
This paper presents our solutions to some problems we encountered in an ongoing attempt to verify the micro-hypervisor currently developed within the Robin project. The problems t...
Hendrik Tews, Tjark Weber, Marcus Völp
SAFECOMP
2010
Springer
14 years 7 months ago
Experiences in Applying Formal Verification in Robotics
Formal verification efforts in the area of robotics are still comparatively scarce. In this paper we report on our experiences with one such effort, which was concerned with design...
Dennis Walter, Holger Täubig, Christoph L&uum...
71
Voted
FMCAD
2007
Springer
15 years 3 months ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony
79
Voted
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
15 years 10 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng