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VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
15 years 10 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
FMCAD
2008
Springer
14 years 11 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse
HYBRID
2010
Springer
14 years 11 months ago
Receding horizon control for temporal logic specifications
In this paper, we describe a receding horizon scheme that satisfies a class of linear temporal logic specifications sufficient to describe a wide range of properties including saf...
Tichakorn Wongpiromsarn, Ufuk Topcu, Richard M. Mu...
ASPDAC
1998
ACM
72views Hardware» more  ASPDAC 1998»
15 years 1 months ago
Space- and Time-Efficient BDD Construction via Working Set Control
Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. Efficient BDD construction techniques become more important as the complexity of proto...
Bwolen Yang, Yirng-An Chen, Randal E. Bryant, Davi...
ICECCS
2007
IEEE
120views Hardware» more  ICECCS 2007»
15 years 1 months ago
Verifying the CICS File Control API with Z/Eves: An Experiment in the Verified Software Repository
Parts of the CICS transaction processing system were modelled formally in the 1980s in a collaborative project between IBM Hursley Park and Oxford University Computing Laboratory....
Leo Freitas, Konstantinos Mokos, Jim Woodcock