1446 search results - page 168 / 290 » Formal analysis of hardware requirements |
81
Voted
FPL
1995
Springer
15 years 4 months ago
1995
Springer
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
97
Voted
CAV
2010
Springer
15 years 4 months ago
2010
Springer
We present a graphical toolset for verifying AADL models, which are gaining widespread acceptance in aerospace, automobile and avionics industries for comprehensively specifying sa...
109
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ASPDAC
2008
ACM
15 years 2 months ago
2008
ACM
The timing models used in current Static Timing Analysis tools use gate delays only for single input switching events. It is well known that the temporal proximity of signals arriv...
92
Voted
ASPDAC
2010
ACM
14 years 10 months ago
2010
ACM
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
143
Voted
PLDI
2010
ACM
15 years 3 months ago
2010
ACM
The most intuitive memory model for shared-memory multithreaded programming is sequential consistency (SC), but it disallows the use of many compiler and hardware optimizations th...