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100
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DATE
2007
IEEE
15 years 10 months ago
2007
IEEE
Formal verification is an important issue in circuit and system design. In this context, Bounded Model Checking (BMC) is one of the most successful techniques. But even if all sp...
129
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MEMOCODE
2007
IEEE
15 years 10 months ago
2007
IEEE
Orthogonal Frequency-Division Multiplexing (OFDM) has become the preferred modulation scheme for both broadband and high bitrate digital wireless protocols because of its spectral...
116
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ATAL
2007
Springer
15 years 10 months ago
2007
Springer
Failures in plan execution can be attributed to errors in the execution of plan steps or violations of the plan structure. The structure of a plan prescribes which actions have to...
117
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CAV
2007
Springer
15 years 10 months ago
2007
Springer
Liveness temporal properties state that something “good” eventually happens, e.g., every request is eventually granted. In Linear Temporal Logic (LTL), there is no a priori bo...
141
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CONCUR
2007
Springer
15 years 10 months ago
2007
Springer
Abstract. We propose a new operational model for shared variable concurrency, in the context of a concurrent, higher-order imperative language `a la ML. In our model the scheduling...