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FAC
2007
128views more  FAC 2007»
14 years 10 months ago
Verifying a signature architecture: a comparative case study
Abstract. We report on a case study in applying different formal methods to model and verify an architecture for administrating digital signatures. The architecture comprises seve...
David A. Basin, Hironobu Kuruma, Kunihiko Miyazaki...
IFM
2000
Springer
15 years 1 months ago
A Process Compensation Language
This paper presents a formal language for the design of component-based enterprise system. The language (StAC) allows the usual parallel and sequential behaviours, but most signifi...
Michael J. Butler, Carla Ferreira
TPHOL
2005
IEEE
15 years 3 months ago
On the Correctness of Operating System Kernels
The Verisoft project aims at the pervasive formal verification of entire computer systems. In particular, the seamless verification of the academic system is attempted. This syst...
Mauro Gargano, Mark A. Hillebrand, Dirk Leinenbach...
ICSEA
2008
IEEE
15 years 4 months ago
Analysis of a Distributed e-Voting System Architecture against Quality of Service Requirements
In this paper we propose that formal modelling techniques are necessary in establishing the trustworthiness of e-voting systems and the software within. We illustrate how a distri...
J. Paul Gibson, Eric Lallet, Jean-Luc Raffy
LPAR
2005
Springer
15 years 3 months ago
Pushdown Module Checking
Model checking is a useful method to verify automatically the correctness of a system with respect to a desired behavior, by checking whether a mathematical model of the system sat...
Laura Bozzelli, Aniello Murano, Adriano Peron