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DILS
2004
Springer
15 years 9 months ago
On the Application of Formal Principles to Life Science Data: a Case Study in the Gene Ontology
Formal principles governing best practices in classification and definition have for too long been neglected in the construction of biomedical ontologies, in ways which have import...
Barry Smith, Jacob Köhler, Anand Kumar
ATVA
2009
Springer
141views Hardware» more  ATVA 2009»
15 years 8 months ago
Formal Verification for High-Assurance Behavioral Synthesis
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
Sandip Ray, Kecheng Hao, Yan Chen, Fei Xie, Jin Ya...
VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
16 years 4 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann
POPL
2004
ACM
16 years 4 months ago
A logic you can count on
We prove the decidability of the quantifier-free, static fragment of ambient logic, with composition adjunct and iteration, which corresponds to a kind of regular expression langu...
Silvano Dal-Zilio, Denis Lugiez, Charles Meyssonni...
MEMOCODE
2007
IEEE
15 years 10 months ago
Towards Equivalence Checking Between TLM and RTL Models
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli...