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» Formal verification at higher levels of abstraction
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HASE
2008
IEEE
14 years 10 months ago
Aiding Modular Design and Verification of Safety-Critical Time-Triggered Systems by Use of Executable Formal Specifications
Designing safety-critical systems is a complex process, and especially when the design is carried out at different f abstraction where the correctness of the design at one level i...
Kohei Sakurai, Péter Bokor, Neeraj Suri
ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
14 years 7 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
FMICS
2010
Springer
14 years 11 months ago
SMT-Based Formal Verification of a TTEthernet Synchronization Function
Abstract. TTEthernet is a communication infrastructure for mixedcriticality systems that integrates dataflow from applications with different criticality levels on a single network...
Wilfried Steiner, Bruno Dutertre
ENTCS
2008
140views more  ENTCS 2008»
14 years 10 months ago
Higher-Order Separation Logic in Isabelle/HOLCF
We formalize higher-order separation logic for a first-order imperative language with procedures and local variables in Isabelle/HOLCF. The assertion language is modeled in such a...
Carsten Varming, Lars Birkedal
BPM
2006
Springer
128views Business» more  BPM 2006»
14 years 11 months ago
Towards Formal Verification of Web Service Composition
Abstract. Web services composition is an emerging paradigm for enabling application integration within and across organizational boundaries. Current Web services composition propos...
Mohsen Rouached, Olivier Perrin, Claude Godart