299 search results - page 27 / 60 » Formal verification of analog designs using MetiTarski |
ECRTS
1998
IEEE
15 years 4 months ago
1998
IEEE
In this paper we demonstrate the usage of a formal description technique for real-time systems called PLCAutomaton [4] by applying this method to a real-world case study. To this ...
112
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EMSOFT
2006
Springer
15 years 1 months ago
2006
Springer
Distributed real-time and embedded (DRE) systems have stringent constraints on timeliness and other properties whose assurance is crucial to correct system behavior. Formal tools ...
105
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VLSID
2002
IEEE
16 years 2 days ago
2002
IEEE
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
FM
2006
Springer
15 years 3 months ago
2006
Springer
Design patterns are usually described in terms of instances. Templates describe sentences of some language with a particular form, generate sentences upon instantiation, and can be...
ACSC
2004
IEEE
15 years 3 months ago
2004
IEEE
An approach to system verification is described in which design artefacts produced during forward engineering are automatically compared to corresponding artefacts produced during...