299 search results - page 28 / 60 » Formal verification of analog designs using MetiTarski |
101
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FAC
2000
14 years 11 months ago
2000
Formal approaches to the design of interactive systems rely on reasoning about properties of the t a very high level of abstraction. Specifications to support such an approach typi...
111
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CODES
2008
IEEE
15 years 1 months ago
2008
IEEE
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
109
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GLVLSI
2008
IEEE
14 years 12 months ago
2008
IEEE
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
DAC
2010
ACM
15 years 3 months ago
2010
ACM
Timing exception verification has become a center of interest as incorrect constraints can lead to chip failures. Proving that a false path is valid or not is a difficult problem ...
76
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FMCAD
2000
Springer
15 years 3 months ago
2000
Springer
Abstract. Model checking is an automated approach to the formal verification of hardware and software. To allow model checking tools to be used by the hardware or software designer...