299 search results - page 29 / 60 » Formal verification of analog designs using MetiTarski |
IJIT
2004
15 years 1 months ago
2004
Recent advances in both the testing and verification of software based on formal specifications of the system to be built have reached a point where the ideas can be applied in a p...
108
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FMCAD
2008
Springer
15 years 1 months ago
2008
Springer
Post-silicon debug is the problem of determining what's wrong when the fabricated chip of a new design behaves incorrectly. This problem now consumes over half of the overall ...
117
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PET
2004
Springer
15 years 5 months ago
2004
Springer
There are a variety of well-known models for access control developed for purposes like formally modeling the access rights on files, databases, and web resources. However, the ex...
107
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FMCAD
2000
Springer
15 years 3 months ago
2000
Springer
We take a fresh look at the problem of how to check safety properties of finite state machines. We are particularly interested in checking safety properties with the help of a SAT-...
BIRTHDAY
2010
Springer
14 years 12 months ago
2010
Springer
Abstract. The error-prone process of formal specification and verification of large systems requires an efficient, evolutionary formal development approach. Development graphs have...