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» Formal verification of analog designs using MetiTarski
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CADE
2007
Springer
16 years 1 days ago
Solving Quantified Verification Conditions Using Satisfiability Modulo Theories
Abstract. First order logic provides a convenient formalism for describing a wide variety of verification conditions. Two main approaches to checking such conditions are pure first...
Yeting Ge, Clark Barrett, Cesare Tinelli
BPM
2006
Springer
119views Business» more  BPM 2006»
15 years 3 months ago
Business Process Design by View Integration
Even though the design of business processes most often has to consolidate the knowledge of several process stakeholders, this fact is utilized only to a limited extent by existing...
Jan Mendling, Carlo Simon
BIRTHDAY
2007
Springer
15 years 3 months ago
Applying a Theorem Prover to the Verification of Optimistic Replication Algorithms
Abstract. The Operational Transformation (OT) approach is a technique for supporting optimistic replication in collaborative and mobile systems. It allows the users to concurrently...
Abdessamad Imine, Michaël Rusinowitch
BCS
2008
15 years 1 months ago
Tools for Traceable Security Verification
Dependable systems evolution has been identified by the UK Computing Research Committee (UKCRC) as one of the current grand challenges for computer science. We present work toward...
Jan Jürjens, Yijun Yu, Andreas Bauer 0002
FMCAD
2007
Springer
15 years 3 months ago
Circuit Level Verification of a High-Speed Toggle
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...
Chao Yan, Mark R. Greenstreet