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» Formal verification of analog designs using MetiTarski
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ACSD
2001
IEEE
74views Hardware» more  ACSD 2001»
15 years 3 months ago
From Code to Models
One of the corner stones of formal methods is the notion traction enables analysis. By the construction of act model we can trade implementation detail for analytical power. The i...
Gerard J. Holzmann
BMCBI
2006
147views more  BMCBI 2006»
14 years 11 months ago
A case study in pathway knowledgebase verification
Background: Biological databases and pathway knowledgebases are proliferating rapidly. We are developing software tools for computer-aided hypothesis design and evaluation, and we...
Stephen A. Racunas, Nigam Shah, Nina V. Fedoroff
SIGSOFT
2003
ACM
16 years 14 days ago
Towards scalable compositional analysis by refactoring design models
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...
Yung-Pin Cheng, Michal Young, Che-Ling Huang, Chia...
SIGSOFT
2007
ACM
16 years 14 days ago
SLEDE: lightweight verification of sensor network security protocol implementations
Finding flaws in security protocol implementations is hard. Finding flaws in the implementations of sensor network security protocols is even harder because they are designed to p...
Youssef Hanna
DAC
2003
ACM
16 years 21 days ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...