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» Formal verification of analog designs using MetiTarski
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116
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CORR
2010
Springer
59views Education» more  CORR 2010»
15 years 6 days ago
Refinement and Verification of Real-Time Systems
This paper discusses highly general mechanisms for specifying the refinement of a real-time system as a collection of lower level parallel components that preserve the timing and ...
Paul Z. Kolano, Carlo A. Furia, Richard A. Kemmere...
CMSB
2004
Springer
15 years 7 months ago
Combining State-Based and Scenario-Based Approaches in Modeling Biological Systems
Biological systems have recently been shown to share many of the properties of reactive systems. This observation has led to the idea of using methods devised for the construction ...
Jasmin Fisher, David Harel, E. Jane Albert Hubbard...
124
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POPL
2010
ACM
15 years 11 months ago
From Program Verification to Program Synthesis
This paper describes a novel technique for the synthesis of imperative programs. Automated program synthesis has the potential to make programming and the design of systems easier...
Saurabh Srivastava, Sumit Gulwani, Jeffrey S. Fost...
141
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TCAD
2008
101views more  TCAD 2008»
15 years 1 months ago
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
129
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EPK
2006
114views Management» more  EPK 2006»
15 years 3 months ago
Verifying Properties of (Timed) Event Driven Process Chains by Transformation to Hybrid Automata
Abstract: Event-driven Process Chains (EPCs) are a commonly used modelling technique for design and documentation of business processes. Although EPCs have an easy-to-understand no...
Stefan Denne