Sciweavers

2813 search results - page 183 / 563
» Formalizing Architectural Connection
Sort
View
ISCA
2011
IEEE
365views Hardware» more  ISCA 2011»
14 years 10 months ago
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...
SIGMOD
2001
ACM
118views Database» more  SIGMOD 2001»
16 years 6 months ago
Proxy-Server Architectures for OLAP
Data warehouses have been successfully employed for assisting decision making by offering a global view of the enterprise data and providing mechanisms for On-Line Analytical proc...
Panos Kalnis, Dimitris Papadias
INFOCOM
2007
IEEE
16 years 20 days ago
Millimeter Wave WPAN: Cross-Layer Modeling and Multi-Hop Architecture
— The 7 GHz of unlicensed spectrum in the 60 GHz band offers the potential for multiGigabit indoor wireless personal area networking (WPAN). With recent advances in the speed of ...
Sumit Singh, Federico Ziliotto, Upamanyu Madhow, E...
ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
15 years 12 months ago
A High Throughput String Matching Architecture for Intrusion Detection and Prevention
Network Intrusion Detection and Prevention Systems have emerged as one of the most effective ways of providing security to those connected to the network, and at the heart of alm...
Lin Tan, Timothy Sherwood
AAAI
1990
15 years 7 months ago
The Design of a Marker Passing Architecture for Knowledge Processing
Knowledge processing is very demanding on computer architectures. Knowledge processing generates subcomputation paths at an exponential rate. It is memory intensive and has high c...
Wing Lee, Dan I. Moldovan