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TVLSI
2010
15 years 1 months ago
A Novel Variation-Tolerant Keeper Architecture for High-Performance Low-Power Wide Fan-In Dynamic or Gates
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
Hamed F. Dadgour, Kaustav Banerjee
INFOCOM
2007
IEEE
16 years 20 days ago
A Cross-Layer Architecture to Exploit Multi-Channel Diversity with a Single Transceiver
—The design of multi-channel multi-hop wireless mesh networks is centered around the way nodes synchronize when they need to communicate. However, existing designs are confined ...
Jay A. Patel, Haiyun Luo, Indranil Gupta
SIGCOMM
1999
ACM
15 years 10 months ago
An Integrated Congestion Management Architecture for Internet Hosts
This paper presents a novel framework for managing network congestion from an end-to-end perspective. Our work is motivated by several trends in traffic patterns that threaten th...
Hari Balakrishnan, Hariharan Shankar Rahul, Sriniv...
228
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ISSADS
2005
Springer
15 years 12 months ago
Database System Architecture - A Walk Through Time: From Centralized Platform to Mobile Computing - Keynote Address
Classical distributed database systems monolithically offer distribution transparency and higher performance. This is made possible by making data available and closer to the appl...
Ali R. Hurson, Yu Jiao
ISCAPDCS
2004
15 years 7 months ago
One-Level Cache Memory Design for Scalable SMT Architectures
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
Muhamed F. Mudawar, John R. Wani