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FDL
2008
IEEE
15 years 4 months ago
RTL Generation of Channel Architecture Templates for a Template-based SoC Design Flow
In this paper, we propose the design methodology for communication channel templates from formal specification to RTL description. In this flow, design and verification start from...
Jinhyun Cho, Soonwoo Choi, Soo Chae
IPPS
2008
IEEE
15 years 9 months ago
DC-SIMD : Dynamic communication for SIMD processors
SIMD (single instruction multiple data)-type processors have been found very efficient in image processing applications, because their repetitive structure is able to exploit the...
Raymond Frijns, Hamed Fatemi, Bart Mesman, Henk Co...
SEW
2006
IEEE
15 years 8 months ago
Retrenching the Purse: Finite Exception Logs, and Validating the Small
The Mondex Electronic Purse is an outstanding example of industrial scale formal refinement, and was the first verification to achieve ITSEC level E6 certification. A formal a...
Richard Banach, Michael Poppleton, Susan Stepney
107
Voted
ISOLA
2010
Springer
15 years 1 months ago
A Theory of Mediators for Eternal Connectors
On the fly synthesis of mediators is a revolutionary approach to the seamless networking of today’s and future digital systems that increasingly need be connected. The resulting...
Paola Inverardi, Valérie Issarny, Romina Sp...
124
Voted
ICFEM
2005
Springer
15 years 8 months ago
An Evidential Tool Bus
Abstract. Theorem provers, model checkers, static analyzers, test generators. . . all of these and many other kinds of formal methods tools can contribute to the analysis and devel...
John M. Rushby