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ISORC
2000
IEEE
15 years 3 months ago
Verification of UML-Based Real-Time System Designs by Means of cTLA
The Unified Modeling Language UML is well-suited for the design of real-time systems. In particular, the design of dynamic system behaviors is supported by interaction diagrams an...
Günter Graw, Peter Herrmann, Heiko Krumm
ISORC
2005
IEEE
15 years 5 months ago
Model-Checking of Component-Based Event-Driven Real-Time Embedded Software
As complexity of real-time embedded software grows, it is desirable to use formal verification techniques to achieve a high level of assurance. We discuss application of model-ch...
Zonghua Gu, Kang G. Shin
BMCBI
2010
104views more  BMCBI 2010»
14 years 11 months ago
Formal reasoning on qualitative models of coinfection of HIV and Tuberculosis and HAART therapy
Background: Several diseases, many of which nowadays pandemic, consist of multifactorial pathologies. Paradigmatic examples come from the immune response to pathogens, in which ca...
Anil Sorathiya, Andrea Bracciali, Pietro Liò...
SACMAT
2009
ACM
15 years 6 months ago
Towards formal security analysis of GTRBAC using timed automata
An access control system is often viewed as a state transition system. Given a set of access control policies, a general safety requirement in such a system is to determine whethe...
Samrat Mondal, Shamik Sural, Vijayalakshmi Atluri
FMCAD
2009
Springer
15 years 6 months ago
Assume-guarantee validation for STE properties within an SVA environment
Abstract—Symbolic Trajectory Evaluation is an industrialstrength verification method, based on symbolic simulation and abstraction, that has been highly successful in data path ...
Zurab Khasidashvili, Gavriel Gavrielov, Tom Melham