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IPPS
2006
IEEE
15 years 3 months ago
An optimal architecture for a DDC
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
Tjerk Bijlsma, Pascal T. Wolkotte, Gerard J. M. Sm...
JCDL
2006
ACM
99views Education» more  JCDL 2006»
15 years 3 months ago
InfoGallery: informative art services for physical library spaces
Much focus in digital libraries research has been devoted to new online services rather than services for the visitors in the physical library. This paper describes InfoGallery, w...
Kaj Grønbæk, Anne Rohde, Balasuthas S...
ARITH
2005
IEEE
15 years 3 months ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...
FCCM
2005
IEEE
115views VLSI» more  FCCM 2005»
15 years 3 months ago
FIFO Communication Models in Operating Systems for Reconfigurable Computing
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
John A. Williams, Neil W. Bergmann, X. Xie
ICMCS
2005
IEEE
162views Multimedia» more  ICMCS 2005»
15 years 3 months ago
Clustering of Video Objects by Graph Matching
We propose a new graph-based data structure, called Spatio Temporal Region Graph (STRG) which can represent the content of video sequence. Unlike existing ones which consider main...
JeongKyu Lee, Jung-Hwan Oh, Sae Hwang