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133
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ICS
2005
Tsinghua U.
15 years 9 months ago
2005
Tsinghua U.
Given the importance of parallel mesh generation in large-scale scientific applications and the proliferation of multilevel SMTbased architectures, it is imperative to obtain ins...
139
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ICS
2005
Tsinghua U.
15 years 9 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
139
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ICS
2005
Tsinghua U.
15 years 9 months ago
2005
Tsinghua U.
As network traffic continues to increase and with the requirement to process packets at line rates, high performance routers need to forward millions of packets every second. Eve...
103
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ICS
2005
Tsinghua U.
15 years 9 months ago
2005
Tsinghua U.
Chip Multiprocessors (CMPs) are flexible, high-frequency platforms on which to support Thread-Level Speculation (TLS). However, for TLS to deliver on its promise, CMPs must explo...
119
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ICS
2005
Tsinghua U.
15 years 9 months ago
2005
Tsinghua U.
A key step in program optimization is the determination of optimal values for code optimization parameters such as cache tile sizes and loop unrolling factors. One approach, which...