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» Fractal Coherence: Scalably Verifiable Cache Coherence
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MICRO
2009
IEEE
129views Hardware» more  MICRO 2009»
15 years 6 months ago
In-network coherence filtering: snoopy coherence without broadcasts
With transistor miniaturization leading to an abundance of on-chip resources and uniprocessor designs providing diminishing returns, the industry has moved beyond single-core micr...
Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha
TC
1998
14 years 11 months ago
Design Verification of the S3.mp Cache-Coherent Shared-Memory System
—This paper describes the methods used to formulate and validate the memory subsystem of the cache-coherent Sun Scalable emory MultiProcessor (S3.mp) at three levels of abstracti...
Fong Pong, Michael C. Browne, Gunes Aybay, Andreas...
ASPLOS
1991
ACM
15 years 3 months ago
LimitLESS Directories: A Scalable Cache Coherence Scheme
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
David Chaiken, John Kubiatowicz, Anant Agarwal
ICPP
1990
IEEE
15 years 3 months ago
Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes
As multiprocessors are scaled beyond single bus systems, there is renewed interest in directory-based cache coherence schemes. These schemes rely on a directory to keep track of a...
Anoop Gupta, Wolf-Dietrich Weber, Todd C. Mowry
HPCA
2008
IEEE
16 years 4 hour ago
An OS-based alternative to full hardware coherence on tiled CMPs
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
Christian Fensch, Marcelo Cintra