990 search results - page 160 / 198 » From Design Patterns to Parallel Architectural Skeletons |
HPCA
2000
IEEE
15 years 2 months ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
MM
2006
ACM
15 years 3 months ago
2006
ACM
We present “equiveillance” as a conceptual framework for understanding the balance between surveillance and sousveillance. In addition to this conceptual framework we also pre...
109
Voted
DAC
2007
ACM
15 years 10 months ago
2007
ACM
Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
86
Voted
HPCA
2006
IEEE
15 years 10 months ago
2006
IEEE
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
179
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POPL
2007
ACM
15 years 10 months ago
2007
ACM
Constraint Handling Rules (CHR) is a concurrent committedchoice constraint logic programming language to describe transformations (rewritings) among multi-sets of constraints (ato...