990 search results - page 181 / 198 » From Design Patterns to Parallel Architectural Skeletons |
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
MIDDLEWARE
2005
Springer
15 years 3 months ago
2005
Springer
Currently, the interest in Ambient Intelligence (or AmI) has increased exponentially due to the widespread use of portable devices. Users demand more and more functionality from t...
IPPS
2009
IEEE
15 years 4 months ago
2009
IEEE
Performance projections of High Performance Computing (HPC) applications onto various hardware platforms are important for hardware vendors and HPC users. The projections aid hard...
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PPOPP
2010
ACM
15 years 6 months ago
2010
ACM
Effective data placement strategies can enhance the performance of data-intensive applications implemented on high end computing clusters. Such strategies can have a significant i...
ICS
2004
Tsinghua U.
15 years 3 months ago
2004
Tsinghua U.
Storage mapping optimization is a flexible approach to folding array dimensions in numerical codes. It is designed to reduce the memory footprint after a wide spectrum of loop tr...