990 search results - page 56 / 198 » From Design Patterns to Parallel Architectural Skeletons |
ICMCS
2007
IEEE
15 years 4 months ago
2007
IEEE
This paper introduces the software framework MMER Lab which allows an effective assembly of modular signal processing systems optimized for memory efficiency and performance. Our...
SMI
2008
IEEE
15 years 4 months ago
2008
IEEE
Hierarchies of patterns of features, of sub-assemblies, or of CSG sub-expressions are used in architectural and mechanical CAD to eliminate laborious repetitions from the design p...
ISCA
2000
IEEE
15 years 2 months ago
2000
IEEE
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
MICRO
1998
IEEE
15 years 2 months ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
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PROCEDIA
2011
14 years 17 days ago
2011
Two decades of microprocessor architecture driven by quantitative 90/10 optimization has delivered an extraordinary 1000-fold improvement in microprocessor performance, enabled by...