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CDES
2006
158views Hardware» more  CDES 2006»
14 years 11 months ago
A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia
EDOC
2007
IEEE
15 years 4 months ago
Modeling and Integrating Aspects into Component Architectures
Dependable software systems are difficult to develop because developers must understand and address several interdependent and pervasive dependability concerns. Features that addr...
Lydia Michotte, Robert B. France, Franck Fleurey
HPDC
1999
IEEE
15 years 2 months ago
Dodo: A User-level System for Exploiting Idle Memory in Workstation Clusters
In this paper, we present the design and implementation of Dodo, an e cient user-level system for harvesting idle memory in o -the-shelf clusters of workstations. Dodo enables dat...
Samir Koussih, Anurag Acharya, Sanjeev Setia
IEEEPACT
2007
IEEE
15 years 4 months ago
FAME: FAirly MEasuring Multithreaded Architectures
Nowadays, multithreaded architectures are becoming more and more popular. In order to evaluate their behavior, several methodologies and metrics have been proposed. A methodology ...
Javier Vera, Francisco J. Cazorla, Alex Pajuelo, O...
EUROPAR
2005
Springer
15 years 3 months ago
A Novel Lightweight Directory Architecture for Scalable Shared-Memory Multiprocessors
There are two important hurdles that restrict the scalability of directory-based shared-memory multiprocessors: the directory memory overhead and the long L2 miss latencies due to ...
Alberto Ros, Manuel E. Acacio, José M. Garc...