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ICCD
2004
IEEE
125views Hardware» more  ICCD 2004»
15 years 6 months ago
IPC Driven Dynamic Associative Cache Architecture for Low Energy
Existing schemes for cache energy optimization incorporate a limited degree of dynamic associativity: either direct mapped or full available associativity (say 4-way). In this pap...
Sriram Nadathur, Akhilesh Tyagi
GLOBECOM
2008
IEEE
15 years 4 months ago
Joint Channel and Mismatch Correction for OFDM Reception with Time-interleaved ADCs: Towards Mostly Digital MultiGigabit Transce
— Time-interleaved (TI) analog-to-digital converters (ADCs) are a promising architecture for realizing the highspeed ADCs required to implement “mostly digital” receivers for...
P. Sandeep, Upamanyu Madhow, Munkyo Seo, Mark J. W...
SBACPAD
2003
IEEE
138views Hardware» more  SBACPAD 2003»
15 years 3 months ago
Finite Difference Simulations of the Navier-Stokes Equations Using Parallel Distributed Computing
 This paper discusses the implementation of a numerical algorithm for simulating incompressible fluid flows based on the finite difference method and designed for parallel compu...
João Paulo De Angeli, Andréa M. P. V...
HPCA
2006
IEEE
15 years 10 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...
ICPPW
2009
IEEE
15 years 4 months ago
Comparing and Optimising Parallel Haskell Implementations for Multicore Machines
—In this paper, we investigate the differences and tradeoffs imposed by two parallel Haskell dialects running on multicore machines. GpH and Eden are both constructed using the h...
Jost Berthold, Simon Marlow, Kevin Hammond, Abdall...