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122
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FPL
2006
Springer
113views Hardware» more  FPL 2006»
15 years 7 months ago
A Novel Heuristic and Provable Bounds for Reconfigurable Architecture Design
This paper is concerned with the application of formal optimisation methods to the design of mixed-granularity FPGAs. In particular, we investigate the appropriate mix and floorpl...
Alastair M. Smith, George A. Constantinides, Peter...
112
Voted
GECCO
2006
Springer
206views Optimization» more  GECCO 2006»
15 years 7 months ago
A dynamically constrained genetic algorithm for hardware-software partitioning
In this article, we describe the application of an enhanced genetic algorithm to the problem of hardware-software codesign. Starting from a source code written in a high-level lan...
Pierre-André Mudry, Guillaume Zufferey, Gia...
129
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ISAAC
2005
Springer
153views Algorithms» more  ISAAC 2005»
15 years 9 months ago
Network Game with Attacker and Protector Entities
Consider an information network with harmful procedures called attackers (e.g., viruses); each attacker uses a probability distribution to choose a node of the network to damage. O...
Marios Mavronicolas, Vicky G. Papadopoulou, Anna P...
154
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ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
15 years 10 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
152
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ICSOC
2004
Springer
15 years 9 months ago
A service-oriented architecture for digital libraries
CiteSeer is currently a very large source of meta-data information on the World Wide Web (WWW). This meta-data is the key material for the Semantic Web. Still, CiteSeer is not yet...
Yves Petinot, C. Lee Giles, Vivek Bhatnagar, Prade...