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» From Program Verification to Program Synthesis
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CAV
2009
Springer
209views Hardware» more  CAV 2009»
16 years 6 days ago
Static and Precise Detection of Concurrency Errors in Systems Code Using SMT Solvers
Context-bounded analysis is an attractive approach to verification of concurrent programs. Bounding the number of contexts executed per thread not only reduces the asymptotic compl...
Shuvendu K. Lahiri, Shaz Qadeer, Zvonimir Rakamari...
VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
16 years 1 days ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
B
2007
Springer
15 years 3 months ago
Automatic Translation from Combined B and CSP Specification to Java Programs
Abstract. A recent contribution to the formal specification and verification of concurrent systems is the integration of the state- and event-based approaches B and CSP, specifical...
Letu Yang, Michael Poppleton
PTS
2010
175views Hardware» more  PTS 2010»
14 years 9 months ago
Test Data Generation for Programs with Quantified First-Order Logic Specifications
We present a novel algorithm for test data generation that is based on techniques used in formal software verification. Prominent examples of such formal techniques are symbolic ex...
Christoph Gladisch
97
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SIGPLAN
2008
14 years 11 months ago
Some thoughts on teaching programming and programming languages
It is argued that the teaching of programming is central to the education of skilled computer professionals, that the teaching of programming languages is central to the teaching ...
John C. Reynolds