The paper presents Save-IDE, an Integrated Development Environment for the development of component-based embedded systems. Save-IDE supports efficient development of dependable ...
The approaches to automatic formal verification of UML models known up to now require a finite bound on the number of objects existing at each point in time. In [4] we have observ...
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
Increasingly, information systems development occurs in the context of existing systems and established organizational processes. Viewing organizational and system components as c...
Eric S. K. Yu, Philippe Du Bois, Eric Dubois, John...
Abstract. Model verification examines the correctness of a model implementation with respect to a model specification. While being described from model specification, implementatio...