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ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
15 years 6 months ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah
104
Voted
GRAPHICSINTERFACE
2007
15 years 3 months ago
Constrained planar remeshing for architecture
Material limitations and fabrication costs generally run at odds with the creativity of architectural design, producing a wealth of challenging computational geometry problems. We...
Barbara Cutler, Emily Whiting
CAGD
1998
99views more  CAGD 1998»
15 years 1 months ago
A Laguerre geometric approach to rational offsets
Laguerre geometry provides a simple approach to the design of rational curves and surfaces with rational offsets. These so-called PH curves and PN surfaces can be constructed from...
Martin Peternell, Helmut Pottmann
DGCI
2006
Springer
15 years 5 months ago
A Benchmark Evaluation of Large-Scale Optimization Approaches to Binary Tomography
Abstract. Discrete tomography concerns the reconstruction of functions with a finite number of values from few projections. For a number of important real-world problems, this tomo...
Stefan Weber, Antal Nagy, Thomas Schüle, Chri...
MICCAI
2006
Springer
16 years 2 months ago
Anatomically Informed Convolution Kernels for the Projection of fMRI Data on the Cortical Surface
Abstract. We present here a method that aims at producing representations of functional brain data on the cortical surface from functional MRI volumes. Such representations are req...
Grégory Operto, Jean-Luc Anton, Olivier Cou...